Wafer level uniformity control in remote plasma film deposition

ABSTRACT

An assembly for use in a process chamber for depositing a film on a wafer. The assembly includes a pedestal having a pedestal top surface extending from a central axis of the pedestal to an outer edge, the pedestal top surface having a plurality of wafer supports for supporting a wafer. A pedestal step having a step surface extending from a step inner diameter towards the outer edge of the pedestal. A focus ring rests on the step surface and having a mesa extending from an outer diameter of the focus ring to a mesa inner diameter. A shelf steps downwards from a mesa surface at the mesa inner diameter, and extends between the mesa inner diameter and an inner diameter of the focus ring. The shelf is configured to support at least a portion of a wafer bottom surface of the wafer at a process temperature.

INCORPORATION BY REFERENCE

An Application Data Sheet is filed concurrently with this specificationas part of the present application. Each application that the presentapplication claims benefit of or priority to as identified in theconcurrently filed Application Data Sheet is incorporated by referenceherein in its entirety and for all purposes.

TECHNICAL FIELD

The present disclosure is related to semiconductor substrate processingmethods and equipment tools, and more particularly, to a designed set ofgeometries of a pedestal configuration to control uniformity ofdeposition.

BACKGROUND OF THE DISCLOSURE

Improved film uniformity is important in plasma-enhanced chemical vapordeposition (PECVD) and plasma atomic layer deposition (ALD)technologies. The chamber systems implementing PECVD and ALD areassociated with a hardware signature that contributes to nonuniform filmdeposition. For example, the hardware signature can be associated withchamber asymmetry and with pedestal asymmetry. Furthermore, manyprocesses experience azimuthal nonuniformity of various origins. Inparticular, multi-station modules performing PECVD and ALD feature alarge, open reactor that may contribute to azimuthal nonuniformities andedge drop effects. Nonuniformities also exist in single station modules,due to nonuniform physical chamber geometries including those caused byassembly and component manufacturing tolerances. As customers push tolocate die ever closer to the wafer edge, the numerical contribution ofthis azimuthal nonuniformity to overall nonuniformity grows. Despitebest efforts to minimize damage and/or non-uniform deposition profiles,traditional PECVD and plasma ALD schemes still need improvement.

Remote plasma processes are used to deposit a carbide film (e.g.,striker carbide) on a wafer. The plasma is placed relatively far awayfrom the wafer surface. Radicals are then transported to the chamber andreact with gases that once distributed deposit a unique carbide film onthe wafer. The current technology uses a standard pedestal designed forPECVD applications for close capacitively coupled plasma showerheads forremote plasma processes.

However, the standard pedestal configuration does not provide thedesired flow profile and/or material conditions near the edge of thewafer in remote plasma processing. The result of the currentconfiguration using PECVD hardware near the wafer results in a loweredge deposition profile. Furthermore, uniformity degrades over time,primarily at wafer edge, where it is most sensitive to the flow profileand local conditions, creating the need to maintain a stable edgecondition at all times. Specifically, PECVD techniques were designed onideal conditions including direct/in-situ capacitive coupling plasmaprocessing between a showerhead and pedestal, which introducenonuniformities when applied to remote plasma processes. For example,wafer ring and pedestal pocket designs were based on ideal conditionsfor PECVD products with direct/in-situ capacitive coupling plasmaprocessing between showerhead and pedestal. Features and materialschosen reflect the requirements of local plasma. These current featureswere specifically designed with the intent of controlling the effects ofthe in-situ plasma at the wafer edge including enhancement ofdeposition, suppression of harmful discharges, and reduction of particlecreation. These concerns are unrelated to remote plasma processing(e.g., striker carbide formation does not require local plasma tuning),but the geometries and materials driven by PECVD would have a negativeimpact to the on wafer performance (e.g., uniformity) of remote plasmaprocessing. In short, the use of these standard PECVD techniquesincluding a baseline reactor using a standard PECVD pedestalconfiguration for remote plasma CVD processes (e.g., for depositingconformal carbide films) introduces significant non-uniformities rangingfrom 2.5-10%, especially out near the edge of the wafer. As anillustration, striker carbide formation does not.

It is in this context that disclosures arise.

SUMMARY

Embodiments of the present disclosure relate to the use of remote plasmaCVD (RPCVD) to deposit conformal carbide films (e.g., striker carbide).A wafer uniformity control knob is disclosed that optimizes theperformance of the conformal carbide film by reducing non-uniform filmdeposition and reducing film performance degradations (includinguniformity and other film characteristics) over time. Thesenon-uniformities are primarily caused but not limited to edge dropeffects, wherein nearby geometries, material, and material conditionsmost likely affect the on wafer performance of the film due to radicaldepletion, film build up, surface condition shifts, and flow profilenear the wafer edge. In particular, in embodiments the wafer level knobis characterized by locally modulating the geometries relative to thewafer, material composition, and surface conditions near the wafer.Controlling these factors allows for elimination of harmful film growthand maintains consistent flow (e.g., especially over at the edge of thewafer) of gas and radicals in order to promote uniform growth of film onthe wafer.

In one embodiment, an assembly is described and used in a processchamber for depositing a film on a wafer. The assembly includes apedestal having a pedestal top surface extending from a central axis ofthe pedestal to an outer edge. The pedestal top surface includes aplurality of wafer supports configured to support a wafer at a wafersupport level above the pedestal top surface. The assembly includes apedestal step of the pedestal. The pedestal step is defined by a stepinner diameter and includes a step surface that extends from the stepinner diameter towards the outer edge of the pedestal. The assemblyincludes a focus ring that is configured to rest on the step surface.The focus ring includes a mesa extending from an outer diameter of thefocus ring to a mesa inner diameter. The focus ring includes a shelfstepping downwards from a mesa surface at the mesa inner diameter. Theshelf extends between the mesa inner diameter and an inner diameter ofthe focus ring, and is configured to support at least a portion of awafer bottom surface of the wafer at a process temperature.

In another embodiment, another assembly is disclosed for use in aprocess chamber for depositing a film on a wafer. The assembly includesa pedestal having a pedestal top surface extending from a central axisof the pedestal to an outer edge. The pedestal top surface includes aplurality of wafer supports configured to support a wafer at a wafersupport level above the pedestal top surface. The assembly includes apedestal step of the pedestal. The pedestal step is defined by a stepinner diameter, and includes a step surface extending from the stepinner diameter towards the outer edge of the pedestal. The pedestal stepis defined by a step height extending down from the pedestal topsurface. The assembly includes a focus ring configured to rest on thestep surface. The focus ring includes a mesa extending from an outerdiameter of the focus ring to a mesa inner diameter. The focus ringincludes a shelf stepping downwards from a mesa surface at the mesainner diameter, wherein the shelf extends between the mesa innerdiameter and an inner diameter of the focus ring. A shelf heightrelative to a ring bottom surface ranges between 0.143 to 0.188 inches.

In still another embodiment, an assembly for use in a process chamberfor depositing a film on a wafer is disclosed. The assembly includes apedestal having a pedestal top surface extending from a central axis ofthe pedestal. The pedestal top surface includes a plurality of wafersupports configured to support a wafer at a wafer support level abovethe pedestal top surface. The assembly includes a raised annular rimconfigured on the outer edge of the pedestal top surface, and isconfigured to block lateral movement of the wafer that is resting on thepedestal. The raised annular rim includes a mesa surface rising abovethe pedestal top surface. The raised annular rim and pedestal topsurface form a pocket configured to receive the wafer. A beveled surfaceis defined on the raised annular rim, wherein the beveled surfaceextends from an inner diameter of the raised annular rim and to an outerdiameter of the pocket on the pedestal top surface. In particular, thebeveled surface is angled with respect to the pedestal top surface at anangle of 90 degrees or less, so that the surface may be a flat wall at90 degrees in one embodiment, or be defined as a beveled transition(e.g., less than 90 degrees).

Other aspects of the disclosure will become apparent from the followingdetailed description, taken in conjunction with the accompanyingdrawings, illustrating by way of example the principles of thedisclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosure may best be understood by reference to the followingdescription taken in conjunction with the accompanying drawings inwhich:

FIG. 1A is a simplified, cross-sectional view of a plasma generatorsystem, in accordance with one embodiment of the present disclosure.

FIG. 1B is a cross-sectional view of a plasma generator system andillustrates a showerhead having a plurality of nozzles configured forinjecting precursor into the chamber, in accordance with one embodimentof the present disclosure.

FIG. 2A is a cross-sectional view of a pedestal assembly including apedestal, wherein an edge of the pedestal and focus ring havinggeometries promoting improvement of the uniformity of film depositionand performance stability over time, in accordance with one embodimentof the present disclosure.

FIG. 2B is a magnification of the edge of the pedestal and focus ring ofthe pedestal assembly of FIG. 2A, in accordance with one embodiment ofthe present disclosure.

FIG. 2C is a magnification of the edge of the pedestal and focus ring ofthe pedestal assembly of FIG. 2A including an extension configured inthe focus ring, in accordance with one embodiment of the presentdisclosure.

FIG. 2D is a magnification of the edge of the pedestal and focus ring ofthe pedestal assembly of FIG. 2A illustrating proposed dimensions forthe geometries promoting improvement of uniformity of film dependent andperformance stability over time, and illustrates the relativepositioning of a shelf of the focus ring and top surface of thepedestal, in accordance with one embodiment of the present disclosure.

FIG. 2D-1 shows baseline dimensions of the pedestal shown in FIG. 2D attemperature, in accordance with one embodiment of the presentdisclosure.

FIG. 2E is a magnification of the edge of the pedestal and focus ring ofthe pedestal assembly of FIG. 2A illustrating proposed dimensions forthe geometries promoting improvement of uniformity of film dependent andperformance stability over time, wherein the shelf of the focus ring isapproximately level with the top surface of the pedestal, in accordancewith one embodiment of the present disclosure.

FIG. 2F is a magnification of the edge of the pedestal and focus ring ofthe pedestal assembly of FIG. 2A illustrating proposed dimensions forthe geometries promoting improvement of uniformity of film dependent andperformance stability over time, wherein the shelf of the focus ring isabove the level of the top surface of the pedestal, in accordance withone embodiment of the present disclosure.

FIG. 3A is a perspective view of a substrate processing system includinga lift pad and pedestal configuration, wherein the lift pad is smallerthan a wafer, in accordance with one embodiment of the presentdisclosure.

FIG. 3B is a cross-sectional diagram of the substrate processing systemof FIG. 3A including a lift pad and pedestal configuration, wherein thelift pad is smaller than a wafer, in accordance with one embodiment ofthe present disclosure.

FIG. 3C is an illustration of a pattern of MCAs on a lift pad andpedestal configuration, in accordance with one embodiment of the presentdisclosure.

FIG. 4A is an illustration of the outer region of the pedestal of thelift pad and pedestal configuration of FIGS. 3A-3B, and includes abeveled surface of the raised annular rim of the pedestal, in accordancewith one embodiment of the present disclosure.

FIG. 4B is a magnification of the edge of the pedestal of the lift padand pedestal configuration of FIGS. 3A-3B and showing a range of anglesfor a beveled surface of a raised annular rim of a pedestal, inaccordance with one embodiment of the present disclosure.

FIGS. 4C-4D are illustrations of the interface between a wafer and thebeveled surface of a raised annular rim of a pedestal, in accordancewith one embodiment of the present disclosure.

DETAILED DESCRIPTION

Although the following detailed description contains many specificdetails for the purposes of illustration, anyone of ordinary skill inthe art will appreciate that many variations and alterations to thefollowing details are within the scope of the present disclosure.Accordingly, the aspects of the present disclosure described below areset forth without any loss of generality to, and without imposinglimitations upon, the claims that follow this description.

Generally speaking, the various embodiments of the present disclosuredescribe a pedestal assembly for use in remote plasma processing thatimplements a new wafer uniformity control knob including a delicatelydesigned set of geometries, surface condition, and material compositionnearby the wafer edge to further control the uniformity to improve below1%, as well as providing stable deposition patterns over time. Thecritical advantages of implementing the proposed designs (to includecontrolling the surfaces of the pedestal near the wafer edge usinggeometry, gas flow, and temperature) would include significantperformance improvement of a novel film and enhanced performancestability for remote plasma film deposition. These improvements providefor longer use of pedestal assemblies before performing periodicmaintenance. Further, these improvements negate the need for fullpedestal assembly replacements at each cycle of periodic maintenance.

With the above general understanding of the various embodiments, exampledetails of the embodiments will now be described with reference to thevarious drawings.

FIG. 1A is a simplified, cross-sectional view of a plasma generatorsystem 100, according to an exemplary embodiment of the presentinvention. It will be appreciated that, although FIG. 1A illustrates anembodiment of the plasma generator system 100 including certaincomponents, additional components or components shaped differently thanthose shown in FIG. 1A may alternatively be employed.

The plasma generator system 100 is configured to generate plasma, whichmay be used to deposit or remove material from a substrate 290 (alsoreferred to throughout as a “wafer”). For example, the plasma generatorsystem 100 may be used in conjunction with systems or components usedfor various plasma processing techniques, such as remote plasmaprocessing, plasma enhanced chemical vapor deposition, plasma etching,plasma stripping or ashing, sputtering, plasma spraying, and the like.Accordingly, the substrate 290 may be a substrate that may be subjectedto one or more of the aforementioned processes. For instance, thesubstrate 290 may be made of relatively pure silicon, germanium, galliumarsenide, or other semiconductor material typically used in thesemiconductor industry, or of silicon admixed with one or moreadditional elements such as germanium, carbon, and the like, in anembodiment. In another embodiment, the substrate 290 may be asemiconductor substrate having layers that have been deposited thereoverduring a conventional semiconductor fabrication process. In stillanother embodiment, the substrate 290 may be a component, such as asheet of glass, ceramic or metal that may be subjected to plasmaprocessing.

The plasma generator system 100 may be a remote, standalone apparatus oran in-situ module that is incorporated into a processing system. Theplasma generator system 100 shown in FIG. 1A is an example of a remoteapparatus. In accordance with an exemplary embodiment of the presentinvention, the plasma generator system 100 includes a container 104, acoil 108, an energy source 110, a gas flow distribution receptacle 106,and a showerhead 112. Although an in-situ module may not be configuredidentically to the embodiment shown in FIG. 1A, it may include similarcomponents.

The container 104 is configured to receive a processing gas that can beionized by an electric field and transformed into a plasma, includingspecies such as electrons, ions, and reactive radicals for depositingmaterial onto or removing material from the substrate 290. In anexemplary embodiment, the container 104 is made of a material that iscapable of enhancing the electric field. For example, the container 104may be made of a dielectric material including, but not limited toquartz, aluminum/sapphire, and ceramic. To contain the plasma therein,the container 104 has a sidewall 116 that defines a plasma chamber 118.The sidewall 116 has any thickness that is suitable for containingplasma within the container 104 and that does not interfere with theelectric field produced by the coil 108.

The sidewall 116, and hence, the plasma chamber 118, are shaped to allowthe plasma to be directed toward the substrate 290. In one exemplaryembodiment, the sidewall 116 has a shape that varies along its axiallength, as depicted in FIG. 1A. For example, the sidewall 116 mayinclude a neck section 120 extending from an inlet end 122 of aplasma-containing section 124 and a tube section 126 extending from anoutlet end 128 of the plasma-containing section 124.

In any case, the plasma-containing section 124 includes an inlet 148 tothe plasma chamber 118. According to a preferred embodiment, theplasma-containing section 124 may be cone-shaped and may have an outletend diameter (shown as dotted line 115) that is greater than an inletend diameter (shown as dotted line 117). In one exemplary embodiment,the outlet end diameter 115 is also greater than the diameter 113 of theneck section 120.

In accordance with another exemplary embodiment of the presentinvention, the tube section 126 has a substantially uniform diameter(shown as dotted line 119) that is substantially equal (e.g., .+−0.0.5mm) to the outlet end diameter 115 of the plasma-containing section 124.In another exemplary embodiment, the diameter 119 of the tube section126 is greater than the outlet end diameter 115 of the plasma-containingsection 124. The tube section 126 includes an outlet 138 having adiameter (depicted as dotted line 121) from the plasma chamber 118 thatmay be at least as large as a diameter of the substrate 290.

According to an exemplary embodiment of the present invention, the necksection 120, the plasma-containing section 124, and the tube section 126have axial lengths that are substantially unequal to each other. In anexemplary embodiment, the neck section 120 has an axial length that issufficient to stabilize the gas flow distribution receptacle 104 in thecontainer 106, but not so long as to impede gas flow into the plasmachamber 118 as further discussed below. In such case, the axial lengthof the neck section 120 is less than that of the plasma-containingsection 124 and is less than that of the tube section 126.

To provide an electric field across the plasma chamber 118, the coil 108surrounds at least a portion of the container 104. In an exemplaryembodiment, the coil 108 is a single member made of a conductivematerial, such as copper. In accordance with another exemplaryembodiment, the coil 108 has a first end 136 and a second end 137between which at least two windings 141, 142 are formed about thecontainer 104. The first end 136 is electrically coupled to the energysource 110. The first winding 141 extends from the first end 136 andmakes one complete rotation about the container 104. The second winding142 is integral with the first winding 141 and encircles the container104 once, terminating at the second end 137, which is electronicallycoupled to a capacitor 158 and an electrical ground 159.

The particular positioning of the first winding 141 relative to thesecond winding 142 may be dependent on a desired position of atoroidally-shaped zone or “plasma zone” 176 in the container 104 atwhich a maximum plasma density will exist. Specifically, the plasma zone176 typically forms in a portion of the plasma chamber 118 that isclosest to the first winding 141, because the first winding 141dissipates more energy from energy source 110 into the processing gasthan any other portion of the coil 108. As a result, the currentreceived by the first winding 141 produces a voltage that is higher thanthat of any other portion of the coil 108 section. Thus, if a desiredlocation of the plasma zone 176 is to be located a particular axialdistance from the substrate 290, then the first winding 141 is disposedaccordingly at a position along the axial length of the container 104.According to an exemplary embodiment, at least two windings 141, 142 areincluded. In particular, the first winding 141 ensures at least oneclosed loop is formed to thereby produce a more stable plasma in theplasma chamber 118, and the inclusion of the second winding 142 enhancesuniformity of the plasma in the plasma chamber 118. Though more windingsmay be included in other embodiments, they are not necessary, as theinclusion of the additional windings does not adversely affect norsubstantially improve the production or quality of plasma in the plasmazone 176.

To form the plasma zone 176, the energy source 110 is electricallycoupled directly to the first end 136 of the coil 108 to form a circuit.The energy source 110 may be a radio frequency (RF) voltage source orother source of energy capable of energizing the coil 108 to form anelectric field. In an exemplary embodiment, the energy source 110includes an RF generator 152 that is selected for an ability to operateat a desired frequency and to supply a signal to the coil 108. Forexample, the RF generator 152 may be selected to operate within afrequency range of about 0.2 MHz to about 20.0 MHz. In one exemplaryembodiment, the RF generator 152 may operate at 13.56 MHz. In anexemplary embodiment, the energy source 110 may include a matchingnetwork 154 disposed between the RF generator 152 and the coil 108. Thematching network 154 may be an impedance matching network that isconfigured to match an impedance of the RF generator 152 to an impedanceof the coil 108. In this regard, the matching network 154 may be made upof a combination of components, such as a phase angle detector and acontrol motor; however, in other embodiments, it will be appreciatedthat other components may be included as well.

In another exemplary embodiment of the circuit 200, the capacitor 158 isincluded to limit voltage flow through the coil 108. In this regard, thecapacitor 158 is selected to have a capacitance that limits apeak-to-peak voltage flow through the coil 108 to a threshold voltage.According to an exemplary embodiment of the present invention, thethreshold voltage may depend on an impedance value of the coil 108 andthe RF generator 152. According to another exemplary embodiment of thepresent invention, the capacitor 158 is also selected for an ability toenhance the impedance-matching capabilities of the matching network 154to match the impedance of RF generator 152 to that of the coil 108. Inany case, the capacitor 158 is electrically coupled to the second end137 of the coil 108 between the coil 108 and the electrical ground 159.

To maximize system operability, the coil 108 is disposed at an optimumlocation around the container 104 that minimizes a volume within theplasma chamber 118 occupied by the plasma zone 176 and maximizes thedensity of plasma in the plasma zone 176. Additionally, each winding141, 142 is disposed a suitable, substantially uniform distance awayfrom the surface of the container 104 so that the plasma zone 176 formswithin the plasma chamber 118 adjacent to an inner surface 163 of thecontainer 104. In this way, the container inner surface 163 may guidethe reactive radicals toward the chamber outlet 138 during processing.For example, in an exemplary embodiment, the coil 108 may be in a rangeof 10 mm and 30 mm away from the container.

The processing gas may be diffused before injection into the plasmachamber 118 to substantially uniformly distribute the gas to the plasmazone 176. In this regard, in one exemplary embodiment, the gas flowdistribution receptacle 106 is disposed in the plasma chamber inlet 148and has any one of numerous shapes, depending on the location of theplasma zone 176 in the container 104. According to one exemplaryembodiment, the gas flow distribution receptacle 106 includes a cupmember 150 and is made of a material that is non-conductive and iscapable of withstanding corrosion when exposed to the processing gas.Suitable materials include, for example, dielectric materials such asquartz.

The cup member 150 may include a cylindrical section 156 and a roundedsection 160. The cylindrical section 156 may define a portion of areception cavity 164 having an open end 161. Gas injection openings 182are included within the rounded section 160 and are adapted to provideflow communication between the reception cavity 164 and the plasmachamber 118. To control the manner in which the processing gas isinjected into the plasma chamber 118, the gas injection openings 182 maybe formed and positioned so that the processing gas flows alongpredetermined gas injection paths. The gas injection paths generallyallow the gas to flow axially from a first location in the receptioncavity 164 through openings 182 to a second location substantially(e.g., .+−0.0.5 mm) adjacent to or over the plasma zone 176.

The number of openings 182, the size of the openings 182, and thedirection in which the openings 182 are formed relative to an outersurface 169 of the receptacle 106 may be further selected to control themanner in which the gas is injected. For example, to substantiallyevenly distribute the processing gas within the plasma chamber 118,thirty to forty openings 182 may be included. In one particular example,twenty-four openings 182 may be included. In other embodiments, more orfewer openings 182 may be included. In one exemplary embodiment, theopenings 182 are disposed symmetrically about the longitudinal axis 171and are substantially evenly spaced around a circumference of therounded section 160 to form a ring. In another exemplary embodiment, theopenings 182 are not evenly spaced around a circumference of the roundedsection 160. For example, sets of two or more openings may be formedclose together, and each set may be equally spaced from the longitudinalaxis 171. In any case, the openings 182 are spaced such that theprocessing gas may be substantially evenly injected into the plasmachamber 118.

When the energy source 110 energizes the coil 108, an electric field isformed in a selected portion of the plasma chamber 118 to thereby ionizethe processing gas that may flow therethrough to form ionized gas. Asused herein, the term “ionized gas” may include, but is not limited to,ions, electrons, neutral species, excited species, reactive radicals,dissociated radicals, and any other species that may be produced whenthe processing gas flows through the electric field. To controldispersion of the ionized gas across the work piece 290, the showerhead112 may be positioned at the plasma chamber outlet 138. In one exemplaryembodiment, the showerhead 112 includes a plate 184. The plate 184 maybe made from any suitable material that is relatively inert with respectto the plasma, such as aluminum or ceramic. Generally, the plate 184 issized to allow gas dispersion over an entirety of the substrate 290 andthus, has a correspondingly suitable diameter.

To allow gas passage therethrough, the plate 184 is relatively porous.In particular, the plate 184 includes through-holes 186 that aresuitably sized and spaced to disperse the ionized gas over the workpiece 290 in a substantially uniform manner. Additionally, thethrough-holes 186 are disposed in a substantially uniform pattern on theshowerhead 112, in one exemplary embodiment but, in another exemplaryembodiment, the through-holes 186 are disposed in a non-uniform pattern.

In an exemplary embodiment of the present invention, the showerhead 112is directly coupled to the container 104, as shown in FIG. 1A. Forexample, the showerhead 112 may include sidewalls 188 that extendaxially from the plate 184 and that are coupled to the container 104 viabolts, clamps, adhesives or other fastening mechanisms. In anotherembodiment, the showerhead 112 may be integral with the container 104.The sidewalls 188 may be used to provide additional distance between theplasma zone 176 and the substrate 290, and thus, may be configuredaccordingly.

FIG. 1B is a simplified, cross-sectional view of a plasma generatorsystem 100B that is configured for remote plasma deposition processes,in accordance with one embodiment of the present disclosure. Plasmagenerator system 100B is similar in configuration to the plasmagenerator system 100 of FIG. 1A, wherein like components are representedby like reference numerals. For example, plasma generator system 100Bincludes a container 104, a coil 108, an energy source 110, a gas flowdistribution receptacle 106, and a showerhead 112′. The plasma generatorsystem 100B illustrates a close-up view of the showerhead 112′. Inparticular, the showerhead 112′ of plasma generator system 100B may beconfigured within the plasma chamber 118, such that when the pedestal140 is moved to a position within the plasma chamber 118, remote plasmadeposition can be performed within the chamber. Both the plasmagenerator systems 100A and 100B may be used for PECVD, ALD, or remoteALD processes.

For example, the plasma generator system 100B may deposit one or morefilms implementing an ALD process, which is also known as atomic layerchemical vapor deposition (ALCVD). ALD produces very thin films that arehighly conformal, smooth, and possess excellent physical properties. ALDuses volatile gases, solids, or vapors that are sequentially introduced(or pulsed) over a heated substrate. In one ALD cycle, films are formedvia alternating self-limiting chemical surface reactions resulting inconformal thin film formation, wherein four operations are performed andcan be defined as an A-P—B—P sequence. In step A, a first precursor isintroduced as a gas, which is absorbed (or adsorbed) into the substrate.In step P right after step A, the reactor chamber is cleared of thegaseous precursor. In step B, a second precursor is introduced as a gas,which reacts with the absorbed precursor to form a monolayer of thedesired material. In step P right after step B, the reactor chamber isagain cleared of the gaseous second precursor. By regulating thisA-P—B—P sequence, the films produced by ALD are deposited a monolayer ata time by repeatedly switching the sequential flow of two or morereactive gases over the substrate. In that manner, the thickness of thefilm may be regulated depending on the number of cycles performed of theA-P—B—P sequence.

Further, the plasma generator system 100B may implement a remote plasmaenhanced ALD deposition process, wherein in the A-P—B—P sequencedescribed above, the second precursor includes radicals formed viaplasma generation. In particular, the plasma does not come into directcontact with the substrate 290. That is, the substrate 290 is placedremote from the plasma source (e.g., plasma containing-section 124 nearwindings 141-142). The plasma flowing into the chamber 118 producesradicals and energetic ions, which function as the second, non-metalprecursor. Because the radicals react very rapidly with the precursor,plasma enhanced or assisted ALD allows for deposition at much lowertemps, and usually with better film properties. In addition, because theplasma is remote from the substrate 290, energetic ion and electronbombardment of the substrate 290 is minimized or removed, therebypreventing substrate surface damage and contamination throughdissociation with by-products or adsorbed precursors (e.g., formedthrough precursor decomposition).

Showerhead 112′ includes a plurality of nozzles 191 that is configuredfor injecting the first precursor into the chamber 118. A layer of thefirst precursor adsorbs onto the wafer 290 resting on the pedestal 140that is placed within the boundaries of chamber 118. After purging thefirst precursor from chamber 118, radicals formed from plasma translatedown to the wafer 290 via through-holes 195.

FIG. 2A is a cross-sectional view of a pedestal assembly 280 including apedestal 140, wherein an edge of the pedestal and focus ring 200 havegeometries promoting improvement of film deposition uniformity anddeposition performance stability over multiple process cycles especiallywhen performing remote plasma processing, in accordance with oneembodiment of the present disclosure. In particular, pedestal assembly280 is shown having a delicately designed set of geometries to promoteuniform film deposition over a wafer 290, including at the wafer edge.Embodiments of the present invention control surface conditions of thepedestal assembly 280 that are near the edge of the wafer duringprocessing with specific geometries in order to minimize flow/materialfrom forming contaminants in that affected area. For example, the novelconfiguration of the pedestal assembly 280 minimizes flow/material frominteracting with the bottom of the wafer by restricting flow/materialmovement at the edge near the focus ring 200. In that manner, thesurface conditions of the pedestal assembly 280 near the edge of thewafer 290 are optimized for flow/material interaction, and theoptimization promotes stable surface conditions of the pedestal assembly280 over multiple deposition process cycles. As such, the period betweenrequired maintenance on the plasma chamber may be increased as theperformance characteristics of the plasma chamber is maintained forlonger periods of time due to reduced deposition degradation.

Specifically, FIG. 2A illustrates a cross-sectional view of pedestal 140with a magnification of the outer region 270 of pedestal assembly 280.As shown, a wafer 290 rests on pedestal 140 and extends close to theouter edge 221, in FIG. 2B, of the pedestal 140. The focus ring 200 sitsin the outer region 270, and more specifically sits near an outer region145 of the pedestal 140 on a pedestal step 230. Extensions 203 withinthe focus ring 200 prevent movement of the focus ring 200 duringprocessing, as will be further described in relation to FIG. 2C.

FIG. 2B shows more detail of the outer region 270 of the pedestal 140′and focus ring 200 of the pedestal assembly 280 of FIG. 2A, inaccordance with one embodiment of the present disclosure. In particular,FIG. 2B illustrates geometries of the pedestal 140′ and focus ring 200promoting uniform film deposition when performing remote plasmaprocessing, wherein pedestal 140′ is configured to cooperatively matewith the focus ring 200 when performing remote plasma processing. Inaddition, the optimized geometries provide for deposition performancestability over multiple process cycles when performing remote plasmaprocessing.

The pedestal assembly 280 includes a pedestal 140′ having a pedestal topsurface 220. As shown, the pedestal top surface 220 and pedestal 140′extend from a central axis 311 of the pedestal 140′ to an outer edge 221of the pedestal. Although not shown in FIGS. 2A-2F, a lift pin assemblymay be configured within the pedestal assembly 280, such that lift pinsmay project through the pedestal 140′ (for example, as the pedestal 140′is raised in relation to the fixed lift pins) to support the wafer whenthe wafer is introduced into the plasma chamber 118 and removed from theplasma chamber 118. Specifically, a lift pin assembly includes aplurality of lift pins extending through a plurality of pedestal shaftsconfigured within the pedestal 140′.

In addition, the pedestal top surface 220 includes a plurality of wafersupports 206 configured to support the wafer 290 at a wafer supportlevel 208 above the pedestal top surface. Each of the wafer supports 206sits within a hole 205 that opens up at the top surface 220. Each wafersupport 206 may further rest on a compliant spacer 207 that sits at thebottom of hole 205. Compliant spacer 207 is configured to prevent thewafer supports 206 (e.g., formed from sapphire) from breaking when awafer 290 is placed thereon and/or for height modulation. In oneembodiment, the configuration of the wafer supports 206 within thepedestal 140′ is important to optimize performance of the pedestalassembly 280 when implemented for remote plasma processing, such asimproved uniformity of film deposition and improved depositionperformance stability. In one embodiment, the positioning of the wafersupports 206 within hole 205 is configured to minimize the distance ofthe wafer support level 208 (dimension “D1” ranging approximatelybetween 5 and 15 mil).

Pedestal 140′ includes a pedestal step 230 defined by a step riser 231and a step surface 232. The step riser 231 is located at a step innerdiameter 233 of the pedestal 140′, wherein the step riser 231 rises fromthe step surface 232 at the step inner diameter 233. In addition, thestep surface 232 extends from the step inner diameter 233 towards theouter edge 221 of the pedestal. In the cross-section of pedestal 140′shown in FIG. 2B, an engagement location 213 is configured at the outeredge 221, such that the step surface 232 stops at the engagementlocation 213. In other cross-sections of pedestal 140′, the step surface232 may extend all the way to the outer edge 221 of pedestal 140′, suchas on the right side of the pedestal assembly 280 shown in FIG. 2A.

The pedestal assembly 280 includes a focus ring 200 that is configuredto rest on the step surface 232. As shown, the bottom surface 202 of thefocus ring 200 rests on the step surface 232. In particular, the focusring 200 includes an inner diameter 241 and an outer diameter 247, suchthat the focus ring 200 may form an annular ring having a thicknessbetween the inner diameter 241 and outer diameter 247. In addition, thefocus ring 200 includes a mesa 212 that extends from an outer diameter247 to a mesa inner diameter 211. The mesa 212 includes a mesa surface210.

The focus ring 200 includes a shelf 240 that is configured to stepdownwards from the mesa surface 210 at the mesa inner diameter 211. Theshelf extends between the mesa inner diameter 211 and an inner diameterof the focus ring 241. As will be described more fully below, the shelf240 is configured to support at least a portion of a wafer bottomsurface 291 of the wafer 290 at a process temperature. That is, theshelf 240 is configured to support at least a portion of a wafer bottomsurface 291 of the wafer 290 during processing. The wafer 290 may form ashape wherein the outer edge of the wafer has a wavy shape, such thatthe wafer 290 takes on a slight potato chip shape. As such, one or morecontact points and/or regions of the edge 292 contact the shelf 240.

Because the spacing between the edge 292 of wafer 290 and the bottomsurface 291 of wafer 290 is reduced, flow/material (e.g., precursorand/or radicals) are prevented from forming and/or occupying the regionnear the junction where the wafer 290, ring shelf 240 and pedestal step230 meet. That is, the focus ring substantially touches the bottomsurface 291 of the wafer 290 during processing. In that manner, becausethe spacing is reduced resulting in limited deposition of precursorand/or radicals contaminants due to lingering precursor and/or radicalspresent in that described spacing are prevented from being deposited onthe focus ring 200 near the shelf 240 and/or on the pedestal 140′ nearthe step 230. As such, contamination of the wafer top surface 291 whichleads to non-uniformities in wafer deposition near the edge 292 of thewafer is also reduced. In traditional pedestal assemblies, the focusring 200 does not touch the wafer 290 during processing, and as such,precursor and radical deposition occurs on the focus ring 200 and outerregion 145 of the pedestal near the junction where the wafer 290, ringshelf 240 and pedestal step 230 meet, which leads to contamination ofthe focus ring 200 and pedestal 140′ resulting in poor performancestability over multiple deposition cycles, and non-uniformities in filmdeposition.

FIG. 2C is a magnification of the outer region 270 of the pedestal 140′of the pedestal assembly 280 of FIG. 2A including one or more extensions203 configured to prevent movement of the focus ring 200 duringprocessing, in accordance with one embodiment of the present disclosure.In particular, the focus ring 200 includes a plurality of extensions 203configured to secure the focus ring 200 to the pedestal 140. Theextensions 203 are configured to prevent the focus ring 200 fromshifting during processing. The extensions 203 are configured to sit inthe engagement locations 213 as shown in FIG. 2B.

In addition, a focus ring support configuration 245 is also shown. Thatis, the pedestal 140′ includes one or more focus ring supportconfigurations 245 distributed appropriately in order to support thefocus ring evenly above the step 230 of the pedestal 140′. The focusring support configurations 245 may be adjusted to achieve a desiredheight 204 of the mesa surface 210 above the pedestal top surface 220,for example. Also, the focus ring support configurations 245 may beadjusted to achieve a desired separation between the bottom surface 202of the focus ring 200 and the step surface 232 of the pedestal 140′.

FIG. 2D is a magnification of the outer region 270 of the pedestalassembly 280 of FIG. 2A, and illustrates baseline dimensions for thegeometries promoting improvement of uniformity of film dependent andperformance stability over time, in accordance with one embodiment ofthe present disclosure. In addition, FIG. 2D illustrates the relativepositioning of the shelf 240 of the focus ring 200 and top surface 220of the pedestal 140′.

In one embodiment, geometric features of the standard pedestal bulkmaterial of aluminum or ceramic (aluminum oxide) are designed to defineand control the flow profile and buildup zones relative to the waferedge 292 (e.g., near the outer region 270 of pedestal assembly 280). Inparticular, the geometries are chosen to compensate and minimize theinfluence of nearby material (e.g., precursor, radical, contaminants,etc.) that cannot be eliminated, but inherently influence the radicaldepletion. The geometry changes include modulating wafer height into thepocket, mesa height, wall angling, wall distance to wafer edge, and mesa(inner and outer) diameter. Additionally, geometries to create waferedge sealing and contact (e.g., with pedestal 140′ or focus ring 200)combined with side and/or backside gas purge are implemented to furtherassist maintaining the stable flow profile, depletion and buildup,and/or surface conditions at the wafer edge 292, in another embodiment.For example, each of the dimensions shown are proposed to be smallerthan the shown dimensions, in embodiments.

In particular, FIG. 2D shows baseline dimensions of the pedestal 140′.For example, the outer edge 221 of pedestal 140′ is shown having adiameter of approximately 13.81 inches, which is greater than thediameter of the wafer 290. In addition, the pedestal shelf 230 that isconfigured to support the focus ring 200 is defined as having an innerdiameter 233 (dimension “D3” of approximately 11.375 inches). The shelf230 extends from the inner diameter 233 to the edge 221. Also, theheight 222 (dimension “D10” of approximately 0.155 inches) of the step230 of pedestal 140′ is shown.

FIG. 2D also shows an exemplary MCA 206 positioned within the pedestal140′. In one embodiment, the position and one or more MCAs 206 patternedin pedestal 140′ is designed to induce bowing of the wafer 290, suchthat the wafer edge 292 bows down with respect to the center of thewafer 290, especially during processing. The center of the wafer 290 maybe located approximately at the central axis 311. Bowing may also occurat room temperature. For example, the wafer 290 may take on a slightdome shape with the center of the wafer higher than at least one portionof the wafer edge 292. The positioning of the MCAs 206 may be closer tothe center of the wafer to induce bowing. In the opposite arrangement,the MCAs can be sized appropriately to require contact between the waferedges and the Focus Ring step higher than the top plane of the MCAs,creating a bowl shape.

In addition, baseline dimensions for the focus ring 200 are shown. Forexample, the focus ring 200 has an inner diameter 241 (dimension “D4” ofapproximately 11.53 inches), and an outer diameter 247 (dimension “D2”of approximately 13.91 inches). The focus ring 200 has a mesa 212, whichis defined by a mesa inner diameter 211 (dimension “D3” of approximately11.87 inches). The shelf 240 is defined within the focus ring 200between the inner diameter 211 of the mesa 212, and the inner diameter241 (dimension “D4” of approximately 11.53 inches) of the focus ring200.

In one embodiment the relative positioning of the shelf 240 of the focusring 200 and top surface 220 of the pedestal 140′ is modulated topromote sealing of the wafer edge 292, such as promoting contact withpedestal 140′ and/or focus ring 200. For example, the distance of theshelf bottom 248 from the ring bottom surface 202 is modulated, suchthat the shelf bottom can be positioned below, at the same level, orabove the top surface 220 of pedestal 140′. For example, the distance242 (dimension “D5” ranging approximately from 0.143 to 0.188 inches) ofthe bottom surface 248 of shelf 240 from the bottom surface 202 of focusring 200 is shown. In another embodiment, the height of riser 246 may bemodulated to achieve the same effect. As shown in FIG. 2D, the distance242 is smaller than a height of the riser 231 of the pedestal step 230,such that the shelf bottom 248 sits below the top surface 220 ofpedestal 140′. For example, the height of riser 246 is shown (dimension“D6” that is greater than 0.033 inches), or in other words thedifference between a height 204 of the focus ring 200 (from a ringbottom surface 202 to the mesa surface 210) and a distance from the ringbottom surface 202 to shelf bottom 248. Modulation of the shelf 240 isreflected in the distance 243 (dimension “D7” ranging between 0 and0.012 inches) between the shelf bottom surface 248 and the top surface220 of pedestal 140′, when the bottom surface 248 sits below the topsurface 220.

FIG. 2D-1 shows baseline dimensions of the pedestal 140′ shown in FIG.2D at temperature (e.g., 400 Celsius), in one embodiment. For example,the outer edge 221 diameter (dimension “D8′” of approximately 13.873inches) of pedestal 140′ is shown, and has a diameter greater than thediameter of the wafer 290. In addition, the pedestal shelf 230 that isconfigured to support the focus ring 200 is defined as having an innerdiameter 233 (dimension “D9′” of approximately 11.427 inches). The shelf230 extends from the inner diameter 233 to the edge 221. Also, theheight 222 of the step 230 of pedestal 140′ is shown (dimension “D10′”of approximately 0.156 inches). Other dimensions are shown (e.g., “D2′”of approximately 13.91 inches, “D6 a” of approximately greater than0.033 inches, “D7′” of approximately 0.012 inches, “D10′” ofapproximately 0.156 inches, “D12′” of approximately 0.062 inches, “D3′”of approximately 11.89 inches, and “D4′” of approximately 11.55 inches).

In other embodiments, the bottom surface 248 of shelf 240 may bepositioned at or above the top surface 220 of pedestal 140′. Forexample, FIG. 2E illustrates the outer region 270 of the pedestalassembly 280 shown in FIG. 2A, wherein the height of the riser 246′(dimension “D6 b” of approximately 0.033 inches) is defined such thatthe bottom surface 248 is approximately level with the top surface 220of pedestal 140′. That is, the distance 242 is approximately equal tothe height of the riser 231 of pedestal step 230. Also, FIG. 2Fillustrates the outer region 270 of pedestal assembly 280 shown in FIG.2A, wherein the height of riser 246″ (dimension “D6 c” rangingapproximately between 0.0 to 0.033 inches) is defined such that thebottom surface 248 is positioned higher than the top surface 220 ofpedestal 140′. That is, the distance 242 is greater than the height ofriser 231 of pedestal step 230.

The separation 244 (dimension “D11” of approximately 0.033 inches)between the mesa surface 210 and the top surface 220 of pedestal 140′ isshown. In embodiments, the height 204 of focus ring 200 is lowered(e.g., less than D11) to promote sealing of the wafer edge 292, such aspromoting contact with pedestal 140′ and/or focus ring 200.

In one embodiment, the gap 239 between focus ring 200 and the pedestalriser 231 is modulated to promote sealing of the wafer edge 292, such aspromoting contact with pedestal 140′ and/or focus ring 200. Inparticular, the gap 239 (dimension “D12” of approximately 0.078 inches)is defined as the distance between the inner diameter 241 of the focusring 200 and the inner diameter 233 of the pedestal step 230.

In another embodiment, the mesa inner diameter 211 is modulated topromote sealing of the wafer edge 292, such as promoting contact withpedestal 140′ and/or focus ring 200. As shown, inner diameter 211(dimension “D3” of approximately 11.87 inches) is shown, but may be madesmaller to decrease the gap between the riser 246 and the edge 292 ofwafer 290 during processing.

In still another embodiment, components of the pedestal 140′ and/orfocus ring 200 in the outer region 270 of the pedestal assembly 280 istreated to promote sealing of the wafer edge 292, such as promotingcontact with pedestal 140′ and/or focus ring 200. The treatment promotesa stable flow profile and surface conditions across multiple depositioncycles, while also reducing depletion and buildup near the wafer edge292. In one embodiment, an 03 passivation is performed in this outerregion 270. In other embodiments, ALD coatings are layered in this outerregion 270. For example, coatings include Yttria, ALN, AlOx, ALON, SiC,and glass.

In still another embodiment, region 145 of pedestal 140′ comprisesalternate materials. For example, region 145 may comprise materialsincluding Yttria, ALN, AlOx, ALON, SiC, and glass. Region 145 may form apedestal ring of optimized geometry and of alternate material (Yttria,AlN, AlOx, ALON, SiC, glass), that is less conducive to radicalrecombination and the growth of film, that are speculated ascontributing to the deterioration of uniformity over time. As theorized,as deposition on the wafer occurs, neighboring areas see a similar filmgrow. Unlike the wafer that is removed, the film on other surfaces(e.g., of pedestal 140′ and focus ring 200 in outer region 270) is thenexposed to clean processes and other gases during idle. These alternatematerials reduce the effect of recombination and the growth of film bymodulating or affecting the rate at which the film grows, changes, andrecombines with radicals.

In still another embodiment, the focus ring 200 may comprise aconsumable material (e.g., quartz, aluminum). The focus ring 200 may bereplaced at periodic maintenance cycles, in order to mitigate the localfilm growth near the wafer edge. Replaceable materials of the focus ring200 allow decoupling the influence and trending of film deposition andeffects of clean processing steps by introducing a fresh material at thePM cycle. In addition, the decoupling is achieved by having a focus ring200 of a material that is closer to the composition and temperature ofeither the wafer 290 (e.g., quartz) or the pedestal 140′ (aluminum).

FIG. 3A is a perspective view of a lift pad and pedestal configuration300 of a substrate processing system configured to perform remote plasmaprocessing, wherein the lift pad 390 is smaller than a wafer 290disposed thereon, in accordance with one embodiment of the presentdisclosure. Geometric features of the standard pedestal bulk material ofaluminum or ceramic (aluminum oxide) are designed to define and controlthe flow profile and buildup zones relative to the wafer edge 292 (e.g.,near the annular rim 320 the pedestal 140″). In particular, thegeometries are chosen to compensate and minimize the influence of nearbymaterial (e.g., precursor, radical, contaminants, etc.) that cannot beeliminated, but inherently influence the radical depletion. The geometrychanges include modulating wafer height into the pocket, mesa height ofthe annular rim 320, wall angling, wall distance to wafer edge, and mesa(inner and outer) diameter. Additionally, geometries to create waferedge sealing and contact (e.g., with pedestal 140″) combined with sideand/or backside gas purge are implemented to further assist maintainingthe stable flow profile, depletion and buildup, and/or surfaceconditions at the wafer edge 292, in another embodiment.

A pedestal and lift pad actuator 305 controls movement of the centralshaft 310′. Because pedestal 140″ is coupled to the central shaft 310′,movement in the central shaft 310′ is translated to the pedestal 140″.In addition, the pedestal and lift pad actuator 305 controls movement ofthe pad shaft 330. Because the lift pad 390 is coupled to the pad shaft330, movement in the pad shaft 330 is translated to the lift pad 390.

The pedestal 140″ of the lift pad and pedestal configuration 300includes a pedestal top surface 325 extending from the central axis 311of the pedestal 140″. A plurality of wafer supports 206 (e.g., MCAs) isdisposed on the top surface 325. For example, FIG. 3C is an illustrationof a pattern of MCAs 206 on pedestal 140″, in one embodiment. Inaddition, a raised rim 320 is disposed on the outer region of thepedestal top surface 325, wherein the raised rim 320 is configured forblocking lateral movement of a wafer 290 that is placed on the pedestal140″.

FIG. 3B is a cross-sectional diagram of the lift pad and pedestalconfiguration 300 of FIG. 3A, wherein the lift pad 390 is smaller than awafer 390 disposed thereon, in accordance with one embodiment of thepresent disclosure. For purposes of illustration only, the pedestal 140″and the lift pad 630 are shown at positions and/or levels allowing forwafer processing.

The pedestal 140″ includes a pedestal top surface 325 extending from thecentral axis 311 of the pedestal 140″. The pedestal top surface 325 isconfigured to support a wafer when placed thereon. The top surface 325may include one or more recesses to provide an interface between thepedestal 140″ and the lift pad 390, such as a recess 340 configured tofacilitate coupling between the pad shaft 330 and the lift pad 390. Forexample, the pedestal 140″ includes a recess 340 centered in thepedestal top surface 325 and extending from the central axis 311 to arecess diameter 391. That is, recess 340 sits over a center portion ofthe pedestal top surface 325. In addition, the top surface 325 may forma pocket 350 defined by the raised annular rim 320. While the pedestal140″ may be described as generally having a circular shape when viewedfrom above, the footprint of the pedestal 140″ may vary from a circle toaccommodate for different features, such as a carrier ring support,focus ring, and end-effector access, etc.

As shown, pedestal 140″ is connected to the actuator 305, which isconfigured for controlling movement of the pedestal 140″. In particular,a central shaft 310′ is coupled to the actuator 305 and the pedestal140″, such that the central shaft 310′ extends between the actuator 305and the pedestal 140″. The central shaft 310′ is configured to move thepedestal 140″ along the central axis 311. As such, movement of theactuator 305 translates into movement of the central shaft 310′, whichin turn translates into movement of the pedestal 140″.

In one embodiment, the pedestal top surface 325 includes a plurality ofwafer supports 206 defined thereon (e.g., shown in FIG. 3A), wherein thewafer supports 206 are configured to support a wafer 290 at a wafersupport level above the pedestal top surface 325. The wafer supportsprovide for a uniform and small gap between the pedestal 140″ and anywafer 290 disposed thereon.

In addition, the pedestal 140″ is shown having two segments 140 a and140 b, for purposes of illustration only. For example, pedestal 140″ maybe formed in two segments to accommodate for formation duringmanufacturing the plurality of heating and/or cooling elements 359. Aspreviously disclosed, it is appreciated that pedestal 140″ is consideredto be one element.

In the lift pad and pedestal configuration 300, the lift pad 390includes a pad top surface 392 that extends from the central axis 470′to a pad diameter. The lift pad 390 is configured rest within the recess340, wherein the recess 340 is configured to receive the lift pad 390.In particular, the lift pad top surface 392 is below the wafer 290 whenthe wafer 290 sits on the wafer supports 206 of the pedestal 140″, suchas in a process position (e.g., when performing plasma processing,treatment and/or film deposition). Further, the lift pad 390 isconfigured to move with the pedestal 140″.

As shown, the lift pad 390 is connected to the actuator 305′, which isconfigured for controlling movement of the lift pad 390. In particular,a pad shaft 330 is coupled to the actuator 305 and the pedestal 140″,such that the pad shaft 330 extends between the actuator 305 and thepedestal 140″. The pad shaft 330 is configured within the central shaft310′ that is connected to the pedestal 140″. In particular, the padshaft 330 is configured to move the lift pad 390 along the central axis311. As such, movement of the actuator 305 translates into movement ofthe pad shaft 330, which in turn translates into movement of the liftpad 390. In one embodiment, the actuator 305 controls movement of boththe lift pad 390 and the pedestal 140″.

Specifically, the pad shaft 330 is configured to separate the lift pad390 from the pedestal 140″ for lift pad rotation, for example, duringprocessing. That is, the lift pad 390 is configured to move up relativeto the pedestal top surface 325 along the central axis 311 when thepedestal 140″, such that the lift pad 390 is separated from the pedestaltop surface 325 by a process rotation displacement for purposes ofrotating the lift pad 390. As such, a wafer 290 that is disposed uponthe lift pad 390 is also separated from the pedestal 140″. The pad shaft330 is also configured to lower the lift pad 390 to rest upon thepedestal 140″.

In particular, when the lift pad 390 is separated from the pedestal140″, the lift pad 390 is configured to rotate relative to the pedestaltop surface 325 between at least a first angular orientation and asecond angular orientation (e.g., between 0 degrees and 180 degrees), ormay continually rotate during processing. This rotation may reduce theeffects of the hardware signature of the pedestal during processing, andalso reduces the effects of the chamber hardware signature duringprocessing.

In other embodiments, the lift pad 390 provides for lift pinfunctionality to raise and lower the wafer during wafer delivery andprocessing. Specifically, the lift pad 390 is configured to move uprelative to the central pedestal top surface 325 when the pedestal is ina bottommost downwards position, such that the lift pad 390 is separatedfrom the pedestal top surface 325 by a displacement large enough forentry of an end-effector arm.

As shown in FIG. 3B, the pedestal 140″ of the lift pad and pedestalconfiguration 300 includes a raised rim 320 disposed on the outer regionof the pedestal top surface 720 (e.g., near outer edge 221′ of pedestal140″), wherein the raised rim 320 is configured for blocking lateralmovement of a wafer 290 that is placed on the pedestal 140″. That is,the rim 320 is a step above the pedestal top surface 325 at a heightsufficient to block movement of the wafer.

The lift pad and pedestal configuration 300 includes a lift pin assemblythat includes one or more lift pins 308. For purposes of illustration,the pedestal 140″ and lift pad 390 are shown at a level allowing forlift pin 308 extension for purposes of wafer delivery, in accordancewith one embodiment of the present disclosure. In particular, the liftpins 308 extend from the lift pad 390 through corresponding pedestalshafts 318 disposed in the pedestal 140″ in such a manner such that anend-effector arm (not shown) carrying a wafer 290 (with or without acarrier ring) is able to maneuver into a position for delivering thewafer to the lift pins 308 or for receiving the wafer from the lift pins308. Corresponding pedestal shafts 318 are aligned and configured toreceive a corresponding lift pin 308 as the pedestal 140″ moves inrelation to the lift pins 308. It is understood that one or more liftpin shafts and corresponding lift pins may be configured within the liftpin assembly to lift up and place or remove the wafer 290 during waferdelivery. As shown, each of the lift pins 308 is coupled to acorresponding lift pin support 307 to effect movement. The lift pinsupports 307 are coupled to a lift pin actuator 306. The lift pinsupport 307 may be of any shape (e.g., annular ring washer, armextending from an annular base, etc.). In particular, during operationof the lift pin assembly, the lift pin 308 is attached to the lift pinsupport 307, and positioned to move within the lift pin shaft relativeto the pedestal 140″ to raise the wafer 290 above the pedestal topsurface 325 and/or to lower the wafer 290 to rest upon the pedestal topsurface 325 during wafer delivery and processing.

FIGS. 4A-4D illustrate of the outer region 145′ of the pedestal 140″ ofthe lift pad and pedestal configuration 300 of FIGS. 3A-3B, and includesa beveled surface 326 of the raised annular rim 320 of the pedestal140″, in accordance with one embodiment of the present disclosure. Asshown, the lift pad and pedestal configuration 300 includes a pedestal140″ having a pedestal top surface 325 extending from a central axis 311of the pedestal 140″. As shown, FIG. 4A shows the relative positioningof the raised annular rim 320 relative to a wafer disposed on the topsurface 325 of the pedestal 140″ that provides a limitation for movementof the wafer 290 and promotes improvement of uniformity of filmdependent and performance stability over time.

In one embodiment, geometric features of the standard pedestal bulkmaterial of aluminum or ceramic (aluminum oxide) are designed to defineand control the flow profile and buildup zones relative to the waferedge 292 when disposed on the pedestal 140″. In particular, thegeometries are chosen to compensate and minimize the influence of nearbymaterial (e.g., precursor, radical, contaminants, etc.) that cannot beeliminated, but inherently influence the radical depletion. The geometrychanges include modulating wafer height into the pocket D16, pocketheight 351, wall angling 327, wall distance to wafer edge 326, andpocket (inner D15 and outer 221) diameter. Additionally, geometries tocreate wafer edge sealing and contact (e.g., with pedestal 140″)combined with side and/or backside gas purge are implemented to furtherassist maintaining the stable flow profile, depletion and buildup,and/or surface conditions at the wafer edge 292, in another embodiment.

The pedestal 140″ includes a raised annular rim 320 configured on theouter edge 221′, wherein the annular rim 320 forms a pocket 350 definedby a pocket outer diameter 352 (dimension “D15” of approximately 11.968inches) and the top surface 325 of the pedestal 140″. The pocket 350 isconfigured to receive the wafer 290, and has a height 351 (dimension“D13” of approximately 0.35 inches). The raised annular rim 320 isconfigured to block lateral movement of the wafer 290 that is resting onthe pedestal 140″. In addition, the annular rim 320 includes a mesasurface 322 rising above the pedestal top surface 325. In oneembodiment, the height 351 is modulated to promote sealing of the waferedge 292 to pedestal 140″. For example, the height 351 may be loweredsuch that the level of the wafer 290 is approximately equal to the levelof the mesa surface 322.

The annular rim 320 includes a beveled surface 326, wherein theangulation is optimized to promote create wafer edge sealing and contact(e.g., with pedestal 140″). In particular, FIG. 4B illustrates the outerregion 145′ of the pedestal 140″ of the lift pad and pedestalconfiguration 300 of FIG. 4A, and more particularly, shows the beveledsurface 326 located approximately at the outer diameter 352 of thepocket 350. The beveled surface 326 is angled with respect to the topsurface 325 of the pedestal 140″ as shown by angle 327 (dimension D14ranging between 0 and 90 degrees).

As shown in FIG. 4C, the beveled surface 326 of the annular rim 320extends from an inner diameter 358 of the raised annular rim 320 and toan outer diameter 352 of the pocket 350 on the pedestal top surface 325,wherein the beveled surface is angled with respect to the pedestal topsurface 325 at an angle 327 (of dimension “D14” of approximately 90degrees or less). The outer diameter 352 is shown (dimension “D15” ofapproximately 11.968 inches). In one embodiment, the outer diameter 352may have a minimum dimension D15 of approximately 11.841 inches at roomtemperature, in one embodiment. In embodiments, the dimension of theouter diameter 352 is modulated to promote sealing of the wafer edge292. That is, the outer diameter 352 is modulated to bring the beveledsurface 326 closer to the edge 292 of the wafer 290 in order to promotesealing of the wafer edge 292 to the pedestal 140″ during processing.Further, the inner diameter 358 may be likewise modulated (dimension“D17” below approximately 11.968 inches). In that manner, the influenceof nearby material (e.g., precursor, radical, contaminants, etc.) thatcannot be eliminated is reduced near the wafer edge 292.

Also shown, exemplary MCAs 206 are positioned within the pedestal 140″.That is, pedestal top surface 325 includes one or more wafer supports206 configured to support a wafer 290 at a wafer support level above thetop surface 325. Each of the wafer supports 206 sits within a hole 205that opens up at the top surface 220. Each wafer support 206 may furtherrest on a compliant spacer 207 that sits at the bottom of hole 205.Compliant spacer 207 is configured to prevent the wafer supports 206(e.g., formed from sapphire) from breaking when a wafer 290 is placedthereon. In one embodiment, the positioning of the wafer supports 206within hole 205 is configured to minimize the distance of the wafersupport level 208 (dimension “D16 ranging approximately between 5 and 15mil). In addition, the position and one or more MCAs 206 patterned inpedestal 140” is designed to induce bowing of the wafer 290, such thatthe wafer edge 292 bows down with respect to the center of the wafer290, especially during processing, as previously described. Thepositioning of the MCAs 206 may be closer to the center of the wafer toinduce bowing.

More particularly, FIGS. 4C-D are illustrations of the interface betweenthe wafer 290 and the beveled surface 296 of the raised annular rim 320,in accordance with embodiments of the present disclosure. As shown inFIG. 4C, edge 292 of wafer 290 has a curved shape. For example, theshape may be an arc, or approximately semicircular. During processing,at least a portion of the edge 292 contacts the beveled surface 326 atcontact point 329 in order to promote edge sealing of the wafer 290 tothe pedestal 140″. In traditional configurations, no contact is achievedbetween the edge 292 and the pedestal 140″. As shown in FIG. 4C, thebeveled surface is angled at approximately 60 degrees, and as such, alower portion of the edge 292 is contacting the beveled surface 326. Itis understood that as the angle 327 of the beveled surface 326 isgreater, the contact point 329 may contact other portions of the edge292, such as near the center of the semicircle forming the edge 292. Forexample, as shown in FIG. 4D, the beveled surface 296 is near verticalwith respect to the pedestal top surface 325, such that the outerdiameter 352 of the pocket 350 is approximately equal to the innerdiameter 326 of the raised annular rim 320.

In still another embodiment, outer region 145′ of the pedestal 140″ istreated to promote a stable flow profile and surface conditions acrossmultiple deposition cycles, while also reducing depletion and buildupnear the wafer edge 292. In one embodiment, an 03 passivation isperformed on outer region 145′. In other embodiments, ALD coatings arelayered in this outer region 145′. For example, coatings include Yttria,ALN, AlOx, ALON, SiC, and glass.

In still another embodiment, region 145′ may form a pedestal ring ofoptimized geometry and of alternate material (Yttria, AlN, AlOx, ALON,SiC, glass), that is less conducive to radical recombination and thegrowth of film, that are speculated as contributing to the deteriorationof uniformity over time. As theorized, as deposition on the waferoccurs, neighboring areas see a similar film grow. Unlike the wafer thatis removed, the film on other surfaces (e.g., of pedestal 140″ in outerregion 145′) is then exposed to clean processes and other gases duringidle. These alternate materials reduce the effect of recombination andthe growth of film by modulating or affecting the rate at which the filmgrows, changes, and recombines with radicals.

While specific embodiments have been provided for a pedestal assemblyfor use in remote plasma processing that implements a new waferuniformity control knob including a delicately designed set ofgeometries, surface condition, and material composition nearby the waferedge to further control the uniformity, as well as providing stabledeposition patterns over time, these are described by way of example andnot by way of limitation. Those skilled in the art having read thepresent disclosure will realize additional embodiments falling withinthe spirit and scope of the present disclosure.

It should be understood that the various embodiments defined herein maybe combined or assembled into specific implementations using the variousfeatures disclosed herein. Thus, the examples provided are just somepossible examples, without limitation to the various implementationsthat are possible by combining the various elements to define many moreimplementations. In some examples, some implementations may includefewer elements, without departing from the spirit of the disclosed orequivalent implementations.

Embodiments of the present disclosure may be practiced with variouscomputer system configurations including hand-held devices,microprocessor systems, microprocessor-based or programmable consumerelectronics, minicomputers, mainframe computers and the like.Embodiments of the present disclosure can also be practiced indistributed computing environments where tasks are performed by remoteprocessing devices that are linked through a wire-based or wirelessnetwork.

With the above embodiments in mind, it should be understood thatembodiments of the present disclosure can employ variouscomputer-implemented operations involving data stored in computersystems. These operations are those requiring physical manipulation ofphysical quantities. Any of the operations described herein that formpart of embodiments of the present disclosure are useful machineoperations. Embodiments of the invention also relate to a device or anapparatus for performing these operations. The apparatus can bespecially constructed for the required purpose, or the apparatus can bea general-purpose computer selectively activated or configured by acomputer program stored in the computer. In particular, variousgeneral-purpose machines can be used with computer programs written inaccordance with the teachings herein, or it may be more convenient toconstruct a more specialized apparatus to perform the requiredoperations.

The disclosure can also be embodied as computer readable code on acomputer readable medium. The computer readable medium is any datastorage device that can store data, which can be thereafter be read by acomputer system. Examples of the computer readable medium include harddrives, network attached storage (NAS), read-only memory, random-accessmemory, CD-ROMs, CD-Rs, CD-RWs, magnetic tapes and other optical andnon-optical data storage devices. The computer readable medium caninclude computer readable tangible medium distributed over anetwork-coupled computer system so that the computer readable code isstored and executed in a distributed fashion.

Although the method operations were described in a specific order, itshould be understood that other housekeeping operations may be performedin between operations, or operations may be adjusted so that they occurat slightly different times, or may be distributed in a system whichallows the occurrence of the processing operations at various intervalsassociated with the processing, as long as the processing of the overlayoperations are performed in the desired way.

Although the foregoing disclosure has been described in some detail forpurposes of clarity of understanding, it will be apparent that certainchanges and modifications can be practiced within the scope of theappended claims. Accordingly, the present embodiments are to beconsidered as illustrative and not restrictive, and embodiments of thepresent disclosure is not to be limited to the details given herein, butmay be modified within the scope and equivalents of the appended claims.

What is claimed is:
 1. A pedestal assembly for use in a process chamber,comprising: a pedestal comprising a pedestal top surface that ishorizontally-oriented along a first plane, the pedestal top surfacehaving a plurality of wafer supports configured to support a wafer at awafer support level above the pedestal top surface; a raised annular rimthat protrudes from the pedestal top surface and is disposed on an outeredge of the pedestal top surface, wherein the raised annular rimcomprises a mesa surface that is horizontally-oriented along a secondplane and that is elevated above the pedestal top surface, and whereinthe raised annular rim and the pedestal top surface define a pocketconfigured to receive the wafer; and a beveled surface that extends fromthe mesa surface to the pedestal top surface, wherein each of theplurality of wafer supports sits within a hole that opens up at thepedestal top surface and rests on a compliant spacer that sits at abottom of the hole, wherein the compliant spacer is configured toprevent each of the wafer supports from breaking and/or for heightmodulation.
 2. The pedestal assembly of claim 1, wherein the beveledsurface is angled with respect to the pedestal top surface at an angleless than 90 degrees.
 3. The pedestal assembly of claim 1, wherein theouter edge of the pedestal comprises a material selected from a groupconsisting of: Yttria, aluminum nitride, aluminum oxide, aluminumoxynitride, silicon carbide, and glass.
 4. The pedestal assembly ofclaim 1, wherein the mesa surface extends from an outer diameter of thepocket to a curved surface that joins the mesa surface to the outer edgeof the pedestal, wherein the outer edge of the pedestal isvertically-oriented relative to the mesa surface.
 5. The pedestalassembly of claim 1, wherein an outer diameter of the pocket isconfigured to promote sealing of a wafer edge of the wafer to thepedestal.
 6. The pedestal assembly of claim 5, wherein the outerdiameter of the pocket is approximately 11.968 inches.
 7. The pedestalassembly of claim 1, wherein an inner diameter of the raised annular rimis less than 11.968 inches.
 8. The pedestal assembly of claim 1, furthercomprising: a lift pin assembly comprising a plurality of lift pins thatextend through a plurality of pedestal shafts disposed within thepedestal.
 9. The pedestal assembly of claim 1, wherein the beveledsurface is angled with respect to the pedestal top surface at an angleof approximately 60 degrees.
 10. The pedestal assembly of claim 1,wherein a height of the pocket is configured to promote sealing of awafer edge of the wafer to the pedestal.
 11. The pedestal assembly ofclaim 1, wherein a height of the pocket is approximately 0.35 inches.12. The pedestal assembly of claim 1, wherein the raised annular rim isconfigured to limit lateral movement of the wafer.
 13. A pedestalassembly for use in a process chamber, comprising: a pedestal comprisinga pedestal top surface that is horizontally-oriented along a firstplane, the pedestal top surface having a plurality of wafer supportsconfigured to support a wafer at a wafer support level above thepedestal top surface; a raised annular rim that protrudes from thepedestal top surface and is disposed on an outer edge of the pedestaltop surface, wherein the raised annular rim comprises a mesa surfacethat is horizontally-oriented along a second plane and that is elevatedabove the pedestal top surface, and wherein the raised annular rim andthe pedestal top surface define a pocket configured to receive thewafer; and a beveled surface that extends from the mesa surface to thepedestal top surface, wherein the beveled surface is angled with respectto the pedestal top surface at an angle less than 90 degrees.
 14. Thepedestal assembly of claim 13, wherein the outer edge of the pedestalcomprises a material selected from a group consisting of: Yttria,aluminum nitride, aluminum oxide, aluminum oxynitride, silicon carbide,and glass.
 15. The pedestal assembly of claim 13, wherein the beveledsurface is configured to contact a lower portion of an outer edge of thewafer to promote edge sealing of the wafer to the pedestal.
 16. Thepedestal assembly of claim 13, wherein the beveled surface is angledwith respect to the pedestal top surface at an angle of approximately 60degrees or less.